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Project Feasibility Study
Hardware Design &
Fabrication
Program Development & Debugging
Product Characterization & Correlation
General
Capabilities to test products in both packaged level Component form as well as die level wafer form
Assignment of Unique Traceable Production Lot Numbers and Tracking of individual Lot test data
On-line Monitoring of Test Yields and Analysis / Reporting of Low Yielding Engineering Lots
Even load balancing technique is adopted to handle any sudden spike in the production volumes, than the usuals
Fool-proof reject handling mechanism at all stages of Testing
Controlled Test Program Release & Revision Control
Controlled Load Boards & associated Hardware Maintenance
Documented well established set-up verification procedures
Component Test
Single-site & Multi-site handling capabilities
Kelvin and True Plunge to Board Contacts available
Soft and Hard Docking Handler Mechanisms
Inhouse design & fabrication of Handler Contactor Interface
On-line inspection of Visual Mechanical Parameters
Wafer Test
Single-site & Multi-Site handling capabilities
Offline and Online Inking capabilities
Wafer Sort Results available in Standard Map formats
On-line inspection of Probe & Ink Mark
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